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 TK15326
Audio Analog Switch FEATURES
s s s s s Wide Operating Voltage Range (2 to 7 V) Low Distortion (typ. 0.003%) Wide Dynamic Range (typ. 6 VP-P) Low Output Impedance (typ. 20 ) Low Switching Noise (typ. 3 mV)
APPLICATIONS
s Audio Systems s Radio Cassettes
DESCRIPTION
The TK15326M is an Analog Switch IC that was developed for audio frequency. Function is to select one output from two inputs in a device that includes two circuits, and the channel can be changed by high level. The TK15326M has a dual power supply and the input bias is direct coupling at GND level. Because the distortion is very low, the TK15326M fits various signals switching. It is best suited for Hi-Fi devices. Operating voltage is wide, the circuit plan is simple. The TK15326M is available in a small plastic surface mount package (SSOP-12).
TK15326
VCC Bch OUT 1ch-in Ach 1KEY GND
VEE 11 Bch 10 OUT 9 8 7 Ach 2 KEY NC 2ch-in
BLOCK DIAGRAM
VCC Ach
+ -
1 ch out
1ch-in 1KEY Bch
+ -
ORDERING INFORMATION
Ach
+ -
2 ch out
TK15326M
Tape/Reel Code
2ch-in 2KEY Bch
+ -
GND VEE
TAPE/REEL CODE
TL: Tape Left
June 1999 TOKO, Inc.
Page 1
TK15326
ABSOLUTE MAXIMUM RATINGS
Supply Voltage ...................................................... 7.5 V Power Dissipation (Note 5) ................................ 350 mW Storage Temperature Range ................... -55 to +150 C Operating Temperature Range ...................-20 to +75 C CONTROL SECTION Input Voltage ................................... -0.3 V to VCC + 0.3 V ANALOG SWITCH SECTION Signal Input Voltage ........................ VEE - 0.3 to VCC + 0.3 Signal Output Current ............................................. 3 mA Operating Voltage Range ............................... 2 to 7 V Maximum Input Frequency .................................. 100 kHz
TK15326M ELECTRICAL CHARACTERISTICS
Test conditions: VCC = 4 V, TA = 25 C, unless otherwise specified.
SYMBOL ICC PARAMETER Supply Current TEST CONDITIONS MIN TYP 3.2 MAX 5.2 UNITS mA
KEY CONTROL SECTION VIL VIH ZIN Input Voltage Low Level Input Voltage High Level Input Impedance Note 1 -0.3 1.8 50 +0.8 VCC + 0.3 V V k
ANALOG SWITCH SECTION THD NL ISO SE P DYN GVA Vcent Vcent IIN ZOUT Total Harmonic Distortion Residual Noise Isolation Separation Maximum Input Signal Level Voltage Gain Input-Output Terminal Voltage Output Terminal Voltage Difference Input Bias Current Output Impedance VIN = 1 Vrms, f = 1 kHz Note 2 VIN = 1 Vrms, F = 10 kHz, Note 3 VIN = 1 Vrms, f = 10 kHz, Note 3 f = 1 kHz, THD = 0.1% f = ~20 kHz GND Bias Between same channel Note 4 DC Impedance - 0.2 2.0 0 0 3 0.5 20
VCC
0.003
0.006 10 -75 -80
% Vrms dB dB Vrms dB
+0.2 13
V mV A
Note 1: The KEY input equivalent circuit is shown in Figure A. 1 channel and 2 channel is the separate action by 1Key pin and 2 key pin. When the control pin is open, it is outputted low level (about 1.4 V). Then the A channel input signal is outputted. The change is carried out at high level. Input Key Note 2: The specification means a value as measurement-input terminal connects to ground through a capacitor. Note 3: ISO is a cross talk between A channel and B channel, SEP is a cross talk between 1 channel and 2 channel. The specification means a value as measurement-input termianl connects to ground through 10 k resistor and capacitor. Note 4: Input equivalent circuit is shown in Figure B. The standard application of TK15326M is the direct connecting with the GND bias. When connecting a capacitor, then to supply a bias voltage from GND to input be any resistor is necessary. Note 5: Power dissipation is 350 mW when mounted as recommended. Derate at 3.0 mW/C for operation above 25C.
Logic
Input
VEE
Figure A
Figure B
Page 2
June 1999 TOKO, Inc.
TK15326
TEST CIRCUITS AND METHODS
SW6 VCC SW3 50 k SW7
SW9
SW8
SW4
50 k 33 F +
SW2 1 kHz 1 Vrms or 2 Vrms 10 kHz 1 Vrms + 10 F SW5 + 10 F
SW1
~
~
10 k
V ~
V _
THD
+ 33 F VEE
1: 2: 3: 4:
The above condition represents 1ch. The above conditions distortion rate of 1-Ach and dynamic range measurement. SW5 is for residual noise measurement. SW8 is for cross talk (ISO or SEP) measurement.
SUPPLY CURRENT (FIGURE 1) This current is a consumption current with a nonloading condition. 1) Bias supply to Pins 2,4,9,11. (This condition is the same with other measurements, omitted from the next for simplicity) 2) Measure the inflow current to Pin 1 from VCC. This current is the supply current.
CONTROL LOW/HIGH LEVEL (FIGURE 2) This level is to measure the threshold level. 1) Input, the VCC to Pin 1 and input VEE to Pin 12. (This condition is the same with other measurements, omitted from the next for simplicity) 2) Input to Pin 4 with sine wave (f = 1 kHz, VIN = 1 Vrms). 3) Connect an oscilloscope to Pin 3. 4) Drop the control voltage gradually from VCC until the sine wave appears at the oscilloscope. This voltage is the threshold level when the wave appears.
VCC +
VCC
A
50 K
50 K
50 K
50 K
+
~
VEE
Cont. + VEE
Figure 1 June 1999 TOKO, Inc.
Figure 2 Page 3
TK15326
TEST CIRCUITS AND METHODS (CONT.)
CONTROL INPUT IMPEDANCE (FIGURE 3) This is the input resistance of the control terminal. 1) Measure the inflow current from VCC to Pin 5. 2) Calculate: IMP = VCC / Inflow Current This resistance is the input impedance.
VCC + VCC +
Cont. + VEE
Figure 4
+
+ VEE
Figure 3
VOLTAGE GAIN (FIGURE 5) This is the output level against input level. 1) Pin 5 is in the open condition, or low level. 2) Connect AC volt meters to Pin 4 and Pin 3. (Using the same type meter is best) 3) Input a sine wave (f = max. 20 kHz, 1 Vrms) to Pin 4. 4) Measure the level of Pin 4 and name this V1. 5) Measure the level of Pin 3 and name this V2. 6) Calculate Gain = 20 Log (( |V2 - V1| )/V1) V1V2 - Gain This value is the voltage gain of 1-Ach. 7) Next, connect Pin 5 to the VCC, or high level. 8) Input the same sine wave to Pin 2. 9) Measure and calculate in the same way. This value is the maximum input level of 1-Bch.
TOTAL HARMONIC DISTORTION (FIGURE 4) Use the lower distortion oscillator for this measurement because distortion of the TK15326 is very low. 1) Pin 5 is in the open condition, or low level. 2) Connect a distortion analyzer to Pin 3. 3) Input the sine wave (1 kHz, 1 Vrms) to Pin 4. 4) Measure the distortion of Pin 3. This value is the distortion of 1-Ach. 5) Next connect Pin 5 to the VCC, or high level. 6) Input the same sine wave to Pin 2. 7) Measure in the same way. This value is the distortion of 1-Bch.
Page 4
June 1999 TOKO, Inc.
TK15326
TEST CIRCUITS AND METHODS (CONT.)
VCC +
VCC +
+
+
Cont. + VEE
Cont. + VEE
Figure 5
Figure 6
MAXIMUM INPUT LEVEL (FIGURE 6) This measurement measures at output side. 1) Pin 5 is in the open condition, or low level. 2) Connect a distortion analyzer and an AC volt meter to Pin 3. 3) Input a sine wave (1 kHz) to Pin 4 and elevate the voltage gradually until the distortion gets to 0.1%. 4) When the distortion amounts to 0.1%, stop elevating and measure the AC level of Pin 3. This value is the maximum input level of 1-Ach. 5) Next, connect Pin 5 to the VCC, or high level. 6) Input the same sine wave to Pin 2. 7) Measure in the same way. This value is the maximum input level of 1-Bch.
RESIDUAL NOISE (FIGURE 7) This value is not S/N ratio. This is a noise which occurs from the device itself. 1) Pin 5 is the open condition, or low level. 2) Connect an AC volt meter to Pin 3. 3) Connect a capacitor from Pin 4 to GND. 4) Measure AC voltage of Pin 3. This value is the noise of 1-Ach. If the influence of noise from outside exists, use optional filters. 5) Next, connect Pin 5 to the VCC, or high level. 6) Connect to GND through a capacitor from Pin 2. 7) Measure in the same way. This value is the noise level of 1-Bch.
June 1999 TOKO, Inc.
Page 5
TK15326
TEST CIRCUITS AND METHODS (CONT.)
VCC +
VCC
+
+
+
+
Cont. + VEE
10 K Cont. + VEE
Figure 7
Figure 8
ISOLATION (FIGURE 8) This is the cross talk between Ach and Bch. 1) Pin 5 is in the open condition, or low level. 2) Connect AC volt meters to Pin 2 and Pin 3. 3) Connect a capacitor and a resistance to GND from Pin 4. 4) Input a sine wave (10 kHz, 1 Vrms) to Pin 2. 5) Measure the level of Pin 2 and name this V3. 6) Measure the level of Pin 3 and name this V4. 7) Calculate: ISO = 20 Log (V4 / V3) This value is the isolation to Ach from Bch. 8) Next, connect Pin 5 to the VCC, or high level. 9) Change line of Pin 2 and Pin 4. 10) Input the same sine wave to Pin 4. 11) Measure and calculate in the same way. This value is the isolation to Bch from Ach.
SEPARATION (FIGURE 9) This is the cross talk between 1ch and 2ch. 1) Control level is free for Pin 5 and Pin 8. 2) Connect AC volt meters to Pin 4 (or Pin 2) and Pin 10. 3) Connect Pin 9 and Pin 11 to GND through capacitors and a resistance from Pin 9 and Pin 11 to GND. 4) Input a sine wave (10 kHz, 1 Vrms) to Pin 2 and Pin 4. 5) Measure the level of Pin 4 and name this V5. 6) Measure the level of Pin 10 and name this V6. 7) Calculate: SEP = 20 Log (V6 / V5) This value is the separation to 2ch from 1ch.
Page 6
June 1999 TOKO, Inc.
TK15326
TEST CIRCUITS AND METHODS (CONT.)
VCC VCC
+
I/O TERMINAL VOLTAGE (FIGURE 10) This is the DC voltage of input and output. Because the input and the output are nearly equal, only the output is measured. 1) Pin 5 is in the open condition, or low level. 2) Connect a DC volt meter to Pin 3 and measure. This value is the terminal voltage of 1-Ach. 3) Next, connect Pin 5 to the VCC, or high level. 4) Measure in the same way. This value is the terminal voltage of 1-Bch.
June 1999 TOKO, Inc.
+
+
+
+
+
Cont.
10 K
+ VEE
Cont.
+ VEE
Figure 9
Figure 10
OUTPUT TERMINAL DIFFERENCE This is the DC output voltage difference between Ach and Bch. This is calculated by using values measured at the I/O Terminal Voltage. Vcent = | (1 - Ach value) - (1 - Bch value) | This value is the voltage difference of 1ch.
Page 7
TK15326
TYPICAL PERFORMANCE CHARACTERISTICS
VCC = 8 V, TA = 25 C, unless otherwise specified.
TOTAL HARMONIC DISTORTION vs. FREQUENCY 0.1
SUPPLY CURRENT VS. SUPPLY VOLTAGE 5 4 ICC (mA) 3 2 1 0 0
0.001 0.1
TOTAL HARMONIC DISTORTION vs. LOAD RESISTANCE 0.1
THD (%)
THD (%)
0.01
0.01
1 2
3 4
5 6 7 8
1 f (kHz)
10
100
0.001 0.1
1 RL (k)
10
100
VCC (V) DYNAMIC RANGE vs. SUPPLY VOLTAGE 5 2 LEVEL (Vrms)
DYNAMIC RANGE vs. LOAD RESISTANCE -60 -70
LEVEL (dB)
ISOLATION vs. FREQUENCY
4
LEVEL (Vrms)
3 2 1 0 0
-80 -90 -100
1
1
2 3 4 5 VCC (V)
6 7 8
0 0.1
1 RL (k)
10
100
-110 0.1
1 f (kHz)
10
100
SEPARATION vs. FREQUENCY -60 -70 1.5
CONTROL THRESHOLD VS. TEMPERATURE
VOLTAGE GAIN VS. TEMPERATURE
+.1
LEVEL (dB)
LEVEL (V)
-80 -90 -100 -110 0.1
1
GVA (dB) -20 0 20 40 60 80
0
0.5
-.1
0 1 f (kHz) 10 100 -20 0 20 40 60 80 TA (C) TA (C)
Page 8
June 1999 TOKO, Inc.
TK15326
TYPICAL PERFORMANCE CHARACTERISTICS (CONT.)
VCC = 8 V, TA = 25 C, unless otherwise specified.
OUTPUT DIFFERENCE VS. TEMPERATURE 1.2 6 LEVEL (Vrms) LEVEL (mV) 3 CURRENT (A) 1.0 .8 .6 .4 .2 0 -20 0 20 40 60 80 TA (C) 0 -20 0 20 40 60 80 TA (C) 0 -20 0 20 40 60 80 TA (C)
RESIDUAL NOISE VS. TEMPERATURE
INPUT BIAS CURRENT VS. TEMPERATURE
4
2
2
1
TERMINAL VOLTAGE AND CIRCUIT
Condition: VCC = +4 V, VEE = -4 V. PIN NO. 1 2 4 9 11 ASSIGNMENT VCC IN A, IN B Input: Open Input: 0 V 3 10 OUT
100
DC VOLTAGE +4 V
CIRCUIT/FUNCTION +Supply Voltage Pin
Floating 0V Signal Input Pin
Input: Open Input: 0 V
-3.3 V 0V Signal Output Pin
5 8
KEY
0V
50 K
Control Pin 6 7 12 GND NC VEE 0V Floating -4 V Ground Pin No Contact Pin -Supply Voltage Pin
June 1999 TOKO, Inc.
Page 9
TK15326
APPLICATION INFORMATION
VCC VEE 2Ain 33 F + 33 F +
KEY INPUT CIRCUIT 1ch and 2ch is separate action by each control keys. Figure 11 is an equivalence circuit of key input. When terminal of key is the open, is outputting high level (about 1.4 V), and then Ach input signal is outputted. The channel at TK15326M can be changed by high level.
RL
1Ain
10 F +
11 10 9 8
10 F +
RL
Key in to Logic
1Key 1Bin
7
2Key 2 Bin
Figure 11
Figure 13
SWITCHING TIME This time is the signal change response time compared to the control key input signal. Figure 12 illustrates the timimg chart. T = 2 s typically.
Bch (Ach) Key in SW out 50%
CROSS TALK (ISOLATION AND SEPARATION) Figure 14 is an example of a layout pattern. As the TK15326M is a direct coupling type, the influence by applications is not almost. But, if it is coupled at the capacitor, by high impedance at input, capacitors acccomplishes the antenna action each other. Then in case its parts are bigger, and the space between capacitors is too narrow, cross talk will increase. Therefore, when designing the print circuit pattern, separate the input capacitors as far as possible and use smaller parts. (e.g., surface mount type)
2AIN VCC GND VEE 2BIN
t Ach (Bch)
Figure 12 APPLICATION Figure 13 illustrates an example of a typical application. The standard application is to use direct coupling at GND level at the inputs and outputs of the TK15326M. For characteristics of distortion and dynamic range versus RL, refer to the graphs in the Typical Performance Characteristics. The TK15326M can be used at the capacitor coupling too, but then the bias supply is necessary from the GND level.
1OUT
2OUT
1AIN
1KEY
2KEY
1BIN
Figure 14
Page 10
June 1999 TOKO, Inc.
TK15326
APPLICATION INFORMATION (CONT.)
OUTPUT TERMINAL VOLTAGE DIFFERENCE This parameter is the output voltage difference between Ach and Bch, and appears when the channel changes from Ach to Bch, or changes to the reverse. Generally, this is called Switching Noise or Pop Noise. If this value is big and if this noise is amplified by the final amplifier and is outputted by the speakers, then it appears as a Shock Sound. Output terminal voltage difference of the TK15326M is a value that adds the internal bias difference and the off-set voltage difference. The value of the TK15326M is very small; its maximum value is 3 mV. So almost the output bias difference will be decided by the supply bias difference. Toko can offer the "Muting IC" if users wish to mute Switching Noise. DIRECT TOUCH The signal input terminals: Internal circuits are operated by constant current circuit, even if VCC or GND is contacted, damage does not occur. The signal output terminal: Outflow or inflow current is decided by ability of final transistor, but protection circuit is not attached. If GND or VCC are contacted damage may occur. Pay attention to long time contact. Do not supply over the maximum rating. Referenced to GND, do not provide to all terminals over VCC +0.3 V or -0.3 V. DC SIGNAL INPUT The output of the TK15326M has a saturation voltage (both VCC and VEE sides about 1.0 V); accordingly the use of a DC signal is not recommend (e.g., the pulse signal etc.) NC TERMINAL NC terminals are not wired inside IC by bonding wire. NC terminals are not tested so do not connect at outside.
June 1999 TOKO, Inc.
Page 11
TK15326
PACKAGE OUTLINE
Marking Information
0.4
SSOP-12
TK15326M
326
Marking 12 7 e1 5.4
AAA
4.4
1.2
YYY
e 0.8
Recommended Mount Pad
1 Lot. No.
6
1.7 max
1.4
0.5
0 ~ 10
5.0
0 ~ 0.2
+0.15
0.3 -0.05 e 0.8
0.1 6.0 0.10 M
+ 0.3
Dimensions are shown in millimeters Tolerance: x.x = 0.2 mm (unless otherwise specified)
Toko America, Inc. Headquarters 1250 Feehanville Drive, Mount Prospect, Illinois 60056 Tel: (847) 297-0070 Fax: (847) 699-7864
TOKO AMERICA REGIONAL OFFICES
Midwest Regional Office Toko America, Inc. 1250 Feehanville Drive Mount Prospect, IL 60056 Tel: (847) 297-0070 Fax: (847) 699-7864 Western Regional Office Toko America, Inc. 2480 North First Street , Suite 260 San Jose, CA 95131 Tel: (408) 432-8281 Fax: (408) 943-9790 Eastern Regional Office Toko America, Inc. 107 Mill Plain Road Danbury, CT 06811 Tel: (203) 748-6871 Fax: (203) 797-1223 Semiconductor Technical Support Toko Design Center 4755 Forge Road Colorado Springs, CO 80907 Tel: (719) 528-2200 Fax: (719) 528-2375
Visit our Internet site at http://www.tokoam.com
The information furnished by TOKO, Inc. is believed to be accurate and reliable. However, TOKO reserves the right to make changes or improvements in the design, specification or manufacture of its products without further notice. TOKO does not assume any liability arising from the application or use of any product or circuit described herein, nor for any infringements of patents or other rights of third parties which may result from the use of its products. No license is granted by implication or otherwise under any patent or patent rights of TOKO, Inc.
Page 12
(c) 1999 Toko, Inc. All Rights Reserved IC-119-TK119xx 0798O0.0K
0.15
+0.15 -0.15
June 1999 TOKO, Inc.
Printed in the USA


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